448 search results - page 36 / 90 » On Parallel Pseudo-Random Number Generation |
BIOINFORMATICS
2012
12 years 7 days ago
2012
Summary: The MolClass toolkit and data portal generates computational models from user-defined small molecule datasets based on structural features identified in hit and non-hit m...
IPPS
2007
IEEE
14 years 4 months ago
2007
IEEE
Over the years reconfigurable computing devices such as FPGAs have evolved from gate-level glue logic to complex reprogrammable processing architectures. However, the tools used f...
IEEEPACT
2000
IEEE
14 years 2 months ago
2000
IEEE
Recent digital signal processors (DSPs) show a homogeneous VLIW-like data path architecture, which allows C compilers to generate efficient code. However, still some special rest...
ASAP
2008
IEEE
14 years 4 months ago
2008
IEEE
Reconfigurable circuits now have a capacity that allows them to be used as floating-point accelerators. They offer massive parallelism, but also the opportunity to design optimi...
IPPS
2000
IEEE
14 years 2 months ago
2000
IEEE
We present a task duplication based scalable scheduling algorithm for Symmetric Multiprocessors (SMP), called S3MP (Scalable Scheduling for SMP), to address the problem of task sc...