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» On Predictability of Caches for Real-Time Applications
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ICCD
2004
IEEE
112views Hardware» more  ICCD 2004»
14 years 4 months ago
Reducing Issue Queue Power for Multimedia Applications using a Feedback Control Algorithm
In this work, we propose a dynamic power-aware issue queue in a general-purpose microprocessor for multimedia applications. Its resources can be adapted at runtime in accordance w...
Yu Bai, R. Iris Bahar
CASES
2007
ACM
13 years 11 months ago
A self-maintained memory module supporting DMM
The memory intensive nature of object-oriented languages such as C++ and Java has created the need of a high-performance dynamic memory management (DMM); however, it is a challeng...
Weixing Ji, Feng Shi, Baojun Qiao
CC
2010
Springer
190views System Software» more  CC 2010»
14 years 2 months ago
Is Reuse Distance Applicable to Data Locality Analysis on Chip Multiprocessors?
On Chip Multiprocessors (CMP), it is common that multiple cores share certain levels of cache. The sharing increases the contention in cache and memory-to-chip bandwidth, further h...
Yunlian Jiang, Eddy Z. Zhang, Kai Tian, Xipeng She...
WMPI
2004
ACM
14 years 1 months ago
Memory coherence activity prediction in commercial workloads
Abstract. Recent research indicates that prediction-based coherence optimizations offer substantial performance improvements for scientific applications in distributed shared memor...
Stephen Somogyi, Thomas F. Wenisch, Nikolaos Harda...
SIGMETRICS
1998
ACM
13 years 12 months ago
Modeling Set Associative Caches Behavior for Irregular Computations
While much work has been devoted to the study of cache behavior during the execution of codes with regular access patterns, little attention has been paid to irregular codes. An i...
Basilio B. Fraguela, Ramon Doallo, Emilio L. Zapat...