51 search results - page 6 / 11 » On Programmable Memory Built-In Self Test Architectures |
DAC
2000
ACM
14 years 9 months ago
2000
ACM
At-speed testing of GHz processors using external testers may not be technically and economically feasible. Hence, there is an emerging need for low-cost, high-quality self-test m...
CSREAESA
2010
13 years 6 months ago
2010
The primary goal of Built-In Self-Test (BIST) for Field Programmable Gate Arrays (FPGAs) is to completely test all programmable logic and routing resources in the device such that ...
ETS
2011
IEEE
12 years 8 months ago
2011
IEEE
—In-field diagnosability of electronic components in larger systems such as automobiles becomes a necessity for both customers and system integrators. Traditionally, functional ...
VLSID
2004
IEEE
14 years 9 months ago
2004
IEEE
Recent research for testable designs has focussed on inserting test structures by re-arranging an Register-TransferLevel (RTL) data path generated from a behavioural description t...
ATS
1998
IEEE
14 years 25 days ago
1998
IEEE
This paper presents a new effective Built-In Self Test (BIST) scheme that achieves 100% fault coverage with low area overhead, and without any modification of the circuit under tes...