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» On Reduction of Lagrange Systems
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DATE
2010
IEEE
124views Hardware» more  DATE 2010»
15 years 9 months ago
Control network generator for latency insensitive designs
—Creating latency insensitive or asynchronous designs from clocked designs has potential benefits of increased modularity and robustness to variations. Several transformations h...
Eliyah Kilada, Kenneth S. Stevens
GLVLSI
2000
IEEE
116views VLSI» more  GLVLSI 2000»
15 years 9 months ago
Reducing bus transition activity by limited weight coding with codeword slimming
Transitions on high capacitance busses in VLSI systems result in considerable power dissipation. Various coding schemes have been proposed in literature to encode the input signal...
Vijay Sundararajan, Keshab K. Parhi
LICS
2000
IEEE
15 years 9 months ago
A Theory of Bisimulation for a Fragment of Concurrent ML with Local Names
Concurrent ML is an extension of Standard ML with π-calculus-like primitives for multi-threaded programming. CML has a reduction semantics, but to date there has been no labelled...
Alan Jeffrey, Julian Rathke
DATE
2010
IEEE
163views Hardware» more  DATE 2010»
15 years 9 months ago
Enhanced Q-learning algorithm for dynamic power management with performance constraint
- This paper presents a novel power management techniques based on enhanced Q-learning algorithms. By exploiting the submodularity and monotonic structure in the cost function of a...
Wei Liu, Ying Tan, Qinru Qiu
151
Voted
INFOCOM
1999
IEEE
15 years 9 months ago
Measurement-Based Band Allocation in Multiband CDMA
Multiband (or multi-carrier) CDMA is a promising approach to increasing the capacity of CDMA networks, while maintaining compatibility with existing systems. This paper investigate...
Lachlan L. H. Andrew