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» On Reduction of Lagrange Systems
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LCN
2006
IEEE
15 years 10 months ago
On Cache Prefetching Strategies For Integrated Infostation-Cellular Network
Infostations provide an inexpensive and high speed wireless disseminator that features discontinuous coverage by bounding many low cost, limited transmission range and high-bandwi...
Jerry Chun-Ping Wang, Hossam ElGindy, Justin Lipma...
QEST
2006
IEEE
15 years 10 months ago
Compositional Performability Evaluation for STATEMATE
Abstract— This paper reports on our efforts to link an industrial state-of-the-art modelling tool to academic state-of-the-art analysis algorithms. In a nutshell, we enable timed...
Eckard Böde, Marc Herbstritt, Holger Hermanns...
ASPDAC
2006
ACM
178views Hardware» more  ASPDAC 2006»
15 years 10 months ago
Hardware architecture design of an H.264/AVC video codec
Abstract—H.264/AVC is the latest video coding standard. It significantly outperforms the previous video coding standards, but the extraordinary huge computation complexity and m...
Tung-Chien Chen, Chung-Jr Lian, Liang-Gee Chen
CASES
2006
ACM
15 years 10 months ago
Memory optimization by counting points in integer transformations of parametric polytopes
Memory size reduction and memory accesses optimization are crucial issues for embedded systems. In the context of affine programs, these two challenges are classically tackled by ...
Rachid Seghir, Vincent Loechner
ASAP
2005
IEEE
169views Hardware» more  ASAP 2005»
15 years 10 months ago
Alleviating the Data Memory Bandwidth Bottleneck in Coarse-Grained Reconfigurable Arrays
It is widely known that parallel operation execution in multiprocessor systems generates a respective increase in memory accesses. Since the memory and bus subsystems provide a li...
Grigoris Dimitroulakos, Michalis D. Galanis, Costa...