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ICCAD
2010
IEEE
158views Hardware» more  ICCAD 2010»
13 years 7 months ago
Novel binary linear programming for high performance clock mesh synthesis
Clock mesh is popular in high performance VLSI design because it is more robust against variations than clock tree at a cost of higher power consumption. In this paper, we propose ...
Minsik Cho, David Z. Pan, Ruchir Puri
GRID
2010
Springer
13 years 6 months ago
Dynamic Partitioning of GATE Monte-Carlo Simulations on EGEE
Abstract The EGEE grid offers the necessary infrastructure and resources for reducing the running time of particle tracking Monte-Carlo applications like GATE. However, efforts are...
Sorina Camarasu-Pop, Tristan Glatard, Jakub T. Mos...
ICASSP
2011
IEEE
13 years 29 days ago
New radix-based FHT algorithm for computing the discrete Hartley transform
In this paper, a new fast Hartley transform (FHT) algorithmradix-22 suitable for pipeline implementation of the discrete Hartley transform (DHT) is presented. The proposed algorit...
Monir Taha Hamood, Said Boussakta
INFOCOM
2012
IEEE
11 years 11 months ago
Robust multi-pipeline scheduling in low-duty-cycle wireless sensor networks
—Data collection is one of the major traffic pattern in wireless sensor networks, which requires regular source nodes to send data packets to a common sink node with limited end...
Yongle Cao, Shuo Guo, Tian He
WIKIS
2006
ACM
14 years 3 months ago
Foucault@Wiki: first steps towards a conceptual framework for the analysis of Wiki discourses
In this paper, we examine the discursive situation of Wikipedia. The primary goal is to explore principle ways of analyzing and characterizing the various forms of communicative u...
Christian Pentzold, Sebastian Seidenglanz