1529 search results - page 168 / 306 » On Timing Analysis of Combinational Circuits |
IROS
2006
IEEE
14 years 2 months ago
2006
IEEE
— This paper proposes an approach allowing indoor environment supervised learning to recognize relevant features for environment understanding. Stochastic preprocessing methods i...
CODES
2008
IEEE
14 years 2 months ago
2008
IEEE
The combination of flit-buffer flow control methods and latency-insensitive protocols is an effective solution for networks-on-chip (NoC). Since they both rely on backpressure...
FTEDA
2006
13 years 8 months ago
2006
As IC technologies scale to finer feature sizes, it becomes increasingly difficult to control the relative process variations. The increasing fluctuations in manufacturing process...
DAC
2005
ACM
14 years 9 months ago
2005
ACM
We present applications of a recently developed automated nonlinear macromodelling approach to the important problem of macromodelling high-speed output buffers/drivers. Good nonl...
ICCAD
2006
IEEE
14 years 5 months ago
2006
IEEE
Abstract— Design variability due to within-die and die-todie process variations has the potential to significantly reduce the maximum operating frequency and the effective yield...