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DATE
2003
IEEE
112views Hardware» more  DATE 2003»
15 years 9 months ago
Transaction-Level Models for AMBA Bus Architecture Using SystemC 2.0
The concept of a SOC platform architecture introduces the concept of a communication infrastructure. In the transaction-level a finite set of architecture components (memories, ar...
Marco Caldari, Massimo Conti, Massimo Coppola, Ste...
PPOPP
2010
ACM
16 years 1 months ago
NOrec: streamlining STM by abolishing ownership records
Drawing inspiration from several previous projects, we present an ownership-record-free software transactional memory (STM) system that combines extremely low overhead with unusua...
Luke Dalessandro, Michael F. Spear, Michael L. Sco...
ECOOP
2008
Springer
15 years 5 months ago
A Uniform Transactional Execution Environment for Java
Abstract. Transactional memory (TM) has recently emerged as an effective tool for extracting fine-grain parallelism from declarative critical sections. In order to make STM systems...
Lukasz Ziarek, Adam Welc, Ali-Reza Adl-Tabatabai, ...
133
Voted
ICFP
1999
ACM
15 years 8 months ago
Atomic Heap Transactions and Fine-grain Interrupts
Languages such as Java, ML, Scheme, and Haskell provide automatic storage management, that is, garbage collection. The two fundamental operations performed on a garbagecollected h...
Olin Shivers, James W. Clark, Roland McGrath
ICDCS
1997
IEEE
15 years 8 months ago
Fragment Reconstruction: Providing Global Cache Coherence in a Transactional Storage System
Cooperative caching is a promising technique to avoid the increasingly formidable disk bottleneck problem in distributed storage systems; it reduces the number of disk accesses by...
Atul Adya, Miguel Castro, Barbara Liskov, Umesh Ma...