Abstract—Power/ground noise is a major source of VLSI circuit timing variations. This work aims to reduce clock network induced power noise by assigning different signal polariti...
Instability of SRAM memory cells derived from the process variation and lowered supply voltage has recently been posing significant design challenges for low power SoCs. This paper...
— When an iterative-decoding aided system is configured to operate at a near-capacity performance, an excessive complexity may be imposed by the iterative process. In this paper...
Although many stopping methods of iterative decoding have been discussed in the literatures extensively, many of them only focus on the solvable decoding. In this paper, we propos...
Abstract. The goal of this paper is to study tractable iteration mechanisms for bags. The presence of duplicates in bags prevents iteration mechanisms developed in the context of s...