In this paper we address the problem of code generation for basic blocks in heterogeneous memory-register DSP processors. We propose a new a technique, based on register-transfer ...
that defines abstract costs for measuring or analyzing the performance of computations, (2) to supply the users with a mapping of these costs onto runtimes on various machine model...
Bayesian networks are directed acyclic graphs that represent dependencies between variables in a probabilistic model. Many time series models, including the hidden Markov models (H...
The guidar project aims to support the complete activity of Graphical User Interface Development And Reuse. We propose to organize the system as a collaborative architecture of in...
Existing network management systems typically use a combination of textual displays and 2D directed graph representations of network topology. We are designing a network managemen...
Steven Feiner, Michelle X. Zhou, Laurence A. Crutc...