11 search results - page 2 / 3 » On combining iteration space tiling with data space tiling f... |
TJS
2002
13 years 7 months ago
2002
This paper describes a tiling technique that can be used by application programmers and optimizing compilers to obtain I/O-efficient versions of regular scientific loop nests. Due ...
ICS
2010
Tsinghua U.
14 years 12 days ago
2010
Tsinghua U.
We present a new cache oblivious scheme for iterative stencil computations that performs beyond system bandwidth limitations as though gigabytes of data could reside in an enormou...
PLDI
2003
ACM
14 years 26 days ago
2003
ACM
Many important applications, such as those using sparse data structures, have memory reference patterns that are unknown at compile-time. Prior work has developed runtime reorderi...
ICPP
1998
IEEE
13 years 12 months ago
1998
IEEE
Exploiting locality at run-time is a complementary approach to a compiler approach for those applications with dynamic memory access patterns. This paper proposes a memory-layout ...
IEEEPACT
2009
IEEE
14 years 2 months ago
2009
IEEE
—Analytical models have been used to estimate optimal values for parameters such as tile sizes in the context of loop nests. However, important algorithms such as fast Fourier tr...