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FPGA
2001
ACM
137views FPGA» more  FPGA 2001»
14 years 6 days ago
A crosstalk-aware timing-driven router for FPGAs
As integrated circuits are migrated to more advanced technologies, it has become clear that crosstalk is an important physical phenomenon that must be taken into account. Crosstal...
Steven J. E. Wilton
DFT
1999
IEEE
125views VLSI» more  DFT 1999»
14 years 1 days ago
Algorithms for Efficient Runtime Fault Recovery on Diverse FPGA Architectures
The inherent redundancy and in-the-field reconfiguration capabilities of field programmable gate arrays (FPGAs) provide alternatives to integrated circuit redundancy-based fault r...
John Lach, William H. Mangione-Smith, Miodrag Potk...
ISVLSI
2007
IEEE
116views VLSI» more  ISVLSI 2007»
14 years 2 months ago
Impact of Process Variations on Carbon Nanotube Bundle Interconnect for Future FPGA Architectures
As CMOS technology continues to scale, copper interconnect (CuI) will hinder the performance and reliability of Field Programmable Gate Arrays (FPGA) motivating the need for alter...
Soumya Eachempati, Narayanan Vijaykrishnan, Arthur...
ISCAS
2006
IEEE
85views Hardware» more  ISCAS 2006»
14 years 1 months ago
Analog frequency response measurement in mixed-signal systems
—We present an efficient approach for on-chip frequency response measurement, including phase and gain, of analog circuitry in mixed-signal systems. The approach uses direct digi...
Charles E. Stroud, Dayu Yang, Foster F. Dai
CANPC
1999
Springer
14 years 7 hour ago
Implementing Application-Specific Cache-Coherence Protocols in Configurable Hardware
Streamlining communication is key to achieving good performance in shared-memory parallel programs. While full hardware support for cache coherence generally offers the best perfo...
David Brooks, Margaret Martonosi