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ERSA
2009
147views Hardware» more  ERSA 2009»
13 years 5 months ago
Fault Avoidance in Medium-Grain Reconfigurable Hardware Architectures
Medium-grain reconfigurable hardware (MGRH) architectures represent a hybrid between the versatility of a field programmable gate array (FPGA) and the computational power of a cust...
Kylan Robinson, José G. Delgado-Frias
FPL
2005
Springer
96views Hardware» more  FPL 2005»
14 years 1 months ago
FPGA PLB Evaluation using Quantified Boolean Satisfiability
This paper describes a novel Field Programmable Gate Array (FPGA) logic synthesis technique which determines if a logic function can be implemented in a given programmable circuit...
Andrew C. Ling, Deshanand P. Singh, Stephen Dean B...
DFT
2005
IEEE
110views VLSI» more  DFT 2005»
14 years 1 months ago
A design flow for protecting FPGA-based systems against single event upsets
SRAM-based Field Programmable Gate Arrays (FPGAs) are very susceptible to Single Event Upsets (SEUs) that may have dramatic effects on the circuits they implement. In this paper w...
Luca Sterpone, Massimo Violante
IPPS
1999
IEEE
13 years 12 months ago
Solving Satisfiability Problems on FPGAs using Experimental Unit Propagation Heuristic
This paperpresents new resultson anapproach for solvingsatisfiability problems (SAT), that is, creating a logic circuit that is specialized to solve each problem instance on Field ...
Takayuki Suyama, Makoto Yokoo, Akira Nagoya
IPPS
2006
IEEE
14 years 1 months ago
ReConfigME: a detailed implementation of an operating system for reconfigurable computing
Reconfigurable computing applications have traditionally had the exclusive use of the field programmable gate array, primarily because the logic densities of the available devices...
Grant B. Wigley, David A. Kearney, Mark Jasiunas