315 search results - page 32 / 63 » On reducing load store latencies of cache accesses |
IPPS
2000
IEEE
14 years 23 hour ago
2000
IEEE
In order to reduce the overhead of synchronizing operations of shared memory multiprocessors, this paper proposes a mechanism, named specMEM, to execute memory accesses following ...
ICMCS
2000
IEEE
14 years 1 days ago
2000
IEEE
Abstract—Due to the high bandwidth requirement and rate variability of compressed video, delivering video across wide area networks (WANs) is a challenging issue. Proxy servers h...
SIGARCH
2008
13 years 7 months ago
2008
As CMP platforms are widely adopted, more and more cores are integrated on to the die. To reduce the off-chip memory access, the last level cache is usually organized as a distribu...
CLUSTER
2005
IEEE
14 years 1 months ago
2005
IEEE
Data intensive applications on clusters often require requests quickly be sent to the node managing the desired data. In many applications, one must look through a sorted tree str...
PLDI
1999
ACM
13 years 12 months ago
1999
ACM
Hardware trends have produced an increasing disparity between processor speeds and memory access times. While a variety of techniques for tolerating or reducing memory latency hav...