315 search results - page 6 / 63 » On reducing load store latencies of cache accesses |
IPPS
2006
IEEE
14 years 1 months ago
2006
IEEE
The load/store queue (LSQ) is one of the most complex parts of contemporary processors. Its latency is critical for the processor performance and it is usually one of the processo...
MICRO
1997
IEEE
13 years 11 months ago
1997
IEEE
We revisit memory hierarchy design viewing memory as an inter-operation communication agent. This perspective leads to the development of novel methods of performing inter-operati...
SAPIR
2004
Springer
14 years 27 days ago
2004
Springer
The demand for internet access has been characterized by an
ISCA
1999
IEEE
13 years 12 months ago
1999
IEEE
As microprocessors become faster, the relative performance cost of memory accesses increases. Bigger and faster caches significantly reduce the absolute load-to-use time delay. Ho...
HIPC
2007
Springer
14 years 1 months ago
2007
Springer
Traditional directory-based cache coherence protocols suffer from long-latency cache misses as a consequence of the indirection introduced by the home node, which must be accessed...