66 search results - page 10 / 14 » On reducing misspeculations in a pipelined scheduler |
SPAA
2006
ACM
14 years 2 months ago
2006
ACM
Most common network protocols (e.g., the Internet Protocol) work with variable size packets, whereas contemporary switches still operate with fixed size cells, which are easier t...
IPPS
1998
IEEE
14 years 23 days ago
1998
IEEE
In this paper we present the design, implementation and evaluation of a runtime system based on collective I/O techniques for irregular applications. We present two models, namely...
TCAD
2002
13 years 8 months ago
2002
In this paper, an instruction-level energy model is proposed for the data-path of very long instruction word (VLIW) pipelined processors that can be used to provide accurate power ...
ANCS
2007
ACM
14 years 16 days ago
2007
ACM
We propose a distributed congestion management scheme for non-blocking, 3-stage Clos networks, comprising plain buffered crossbar switches. VOQ requests are routed using multipath...
MICRO
1998
IEEE
14 years 23 days ago
1998
IEEE
Load latency remains a significant bottleneck in dynamically scheduled pipelined processors. Load speculation techniques have been proposed to reduce this latency. Dependence Pred...