336 search results - page 4 / 68 » On structure and suboptimality in placement |
ICCAD
1995
IEEE
13 years 11 months ago
1995
IEEE
Implementing a built-in self-test by a "test per clock" scheme offers advantages concerning fault coverage, detection of delay faults, and test application time. Such a ...
VLSI
2007
Springer
14 years 1 months ago
2007
Springer
— While physically driven synthesis techniques have proven to be an effective method to meet tight timing constraints required by a design, the incremental placement step during ...
TCOM
2011
13 years 1 months ago
2011
Abstract—In this paper, we study the relay station (RS) placement strategy in IEEE 802.16j WiMAX networks. Specifically, the impact of RS placement on IEEE 802.16j network perfo...
ICCAD
2003
IEEE
14 years 4 months ago
2003
IEEE
DNA probe arrays have emerged as a core genomic technology that enables cost-effective gene expression monitoring, mutation detection, single nucleotide polymorphism analysis and ...
IPPS
2003
IEEE
14 years 24 days ago
2003
IEEE
Partial reconfiguration allows for mapping and executing several tasks on an FPGA during runtime. Multitasking on FPGAs raises a number of questions on the management of the reco...