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» On the Architecture of System Verification Environments
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PDCAT
2007
Springer
14 years 2 months ago
A Distributed Virtual Machine for Parallel Graph Reduction
We present the architecture of nreduce, a distributed virtual machine which uses parallel graph reduction to run programs across a set of computers. It executes code written in a ...
Peter M. Kelly, Paul D. Coddington, Andrew L. Wend...
HAPTICS
2006
IEEE
14 years 2 months ago
Control and Performance of the Rotational-to-Linear Cobotic Transmission
We examine the motion control bandwidth and stable impedance range of the Cobotic Hand Controller, a novel, six-degree-offreedom, admittance controlled haptic display. A highly ge...
Eric L. Faulring, J. Edward Colgate, Michael A. Pe...
IPPS
2006
IEEE
14 years 2 months ago
Grid solutions for biological and physical cross-site simulations on the TeraGrid
Computational grids and grid middleware offer unprecedented computational power and storage capacity, and thus, have opened the possibility of solving problems that were previousl...
Suchuan Dong, Nicholas T. Karonis, George E. Karni...
IPPS
2006
IEEE
14 years 2 months ago
Performance evaluation of wormhole routed network processor-memory interconnects
Network line cards are experiencing ever increasing line rates, random data bursts, and limited space. Hence, they are more vulnerable than other processormemory environments, to ...
Taskin Koçak, Jacob Engel
RTCSA
2006
IEEE
14 years 2 months ago
Portable Execution Time Analysis Method
We propose a new execution time prediction method that combines measurement-based execution time analysis and simulation-based memory access analysis. In measurement-based executi...
Keiji Yamamoto, Yutaka Ishikawa, Toshihiro Matsui