6608 search results - page 8 / 1322 » On the Completeness of Model Checking |
ACSD
2009
IEEE
14 years 2 months ago
2009
IEEE
We present a formal semantics for a subset of Verilog, commonly used to describe cell libraries, in terms of transition systems. Such transition systems can serve as input to symb...
DATE
2007
IEEE
14 years 1 months ago
2007
IEEE
Formal verification is an important issue in circuit and system design. In this context, Bounded Model Checking (BMC) is one of the most successful techniques. But even if all sp...
CAV
2004
Springer
14 years 23 days ago
2004
Springer
Bounded Model Checking, although complete in theory, has been thus far limited in practice to falsification of properties that were not invariants. In this paper we propose a term...
ICST
2008
IEEE
14 years 1 months ago
2008
IEEE
Flash memory has become virtually indispensable in most mobile devices, such as mobile phones, digital cameras, mp3 players, etc. In order for mobile devices to successfully provi...
QOSA
2009
Springer
13 years 12 months ago
2009
Springer
When software projects evolve their actual implementation and their intended architecture may drift apart resulting in problems for further maintenance. As a countermeasure it is g...