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» On the Complexity of Circuit Satisfiability
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DAC
2005
ACM
13 years 10 months ago
A combined feasibility and performance macromodel for analog circuits
The need to reuse the performance macromodels of an analog circuit topology challenges existing regression based modeling techniques. A model of good reusability should have a num...
Mengmeng Ding, Ranga Vemuri
ISCAS
2002
IEEE
89views Hardware» more  ISCAS 2002»
14 years 1 months ago
Mapping the wavelet transform onto silicon: the dynamic translinear approach
In this paper, an analog implementation of the Wavelet Transform (WT) is presented. The circuit is based on the Dynamic Translinear (DTL) circuit technique and implements, by mean...
Sandro A. P. Haddad, Wouter A. Serdijn
BMCBI
2010
143views more  BMCBI 2010»
13 years 8 months ago
An efficient biological pathway layout algorithm combining grid-layout and spring embedder for complicated cellular location inf
Background: Graph drawing is one of the important techniques for understanding biological regulations in a cell or among cells at the pathway level. Among many available layout al...
Kaname Kojima, Masao Nagasaki, Satoru Miyano
ICCD
2004
IEEE
100views Hardware» more  ICCD 2004»
14 years 5 months ago
Layout Driven Optimization of Datapath Circuits using Arithmetic Reasoning
This paper proposes a new formalism for layout-driven optimization of datapaths. It is based on preserving an arithmetic bit level representation of the arithmetic circuit portion...
Ingmar Neumann, Dominik Stoffel, Kolja Sulimma, Mi...
TAMC
2007
Springer
14 years 2 months ago
Improving the Average Delay of Sorting
In previous work we have introduced an average-case measure for the time complexity of Boolean circuits – that is the delay between feeding the input bits into a circuit and the ...
Andreas Jakoby, Maciej Liskiewicz, Rüdiger Re...