Retiming has been shown to be a powerful technique for improving the performance of synchronous circuits. However, even though retiming algorithms of polynomial time complexity ha...
For submicron integrated circuits, 3D numerical techniques are required to accurately compute the values of the interconnect capacitances. In this paper, we describe an hierarchic...
This paper focuses on parallelization of the classic static timing analysis (STA) algorithm for verifying timing characteristics of digital integrated circuits. Given ever-increasi...
Akintayo Holder, Christopher D. Carothers, Kerim K...
— We discuss a framework for defining physical open systems on higher-dimensional complexes. We start with the formalization of the dynamics of open electrical circuits and the ...
Current techniques used in pipelining recursive filters require significant hardware complexity. These techniques attempt to preserve the exact frequency response of the origina...
Aditya Gupta, Andrew C. Singer, Naresh R. Shanbhag