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» On the Complexity of Circuit Satisfiability
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ISVLSI
2002
IEEE
129views VLSI» more  ISVLSI 2002»
14 years 1 months ago
Accelerating Retiming Under the Coupled-Edge Timing Model
Retiming has been shown to be a powerful technique for improving the performance of synchronous circuits. However, even though retiming algorithms of polynomial time complexity ha...
Ingmar Neumann, Kolja Sulimma, Wolfgang Kunz
ICCAD
1993
IEEE
121views Hardware» more  ICCAD 1993»
14 years 28 days ago
Hierarchical extraction of 3D interconnect capacitances in large regular VLSI structures
For submicron integrated circuits, 3D numerical techniques are required to accurately compute the values of the interconnect capacitances. In this paper, we describe an hierarchic...
Arjan J. van Genderen, N. P. van der Meijs
IPPS
2010
IEEE
13 years 6 months ago
Prototype for a large-scale static timing analyzer running on an IBM Blue Gene
This paper focuses on parallelization of the classic static timing analysis (STA) algorithm for verifying timing characteristics of digital integrated circuits. Given ever-increasi...
Akintayo Holder, Christopher D. Carothers, Kerim K...
CDC
2008
IEEE
102views Control Systems» more  CDC 2008»
14 years 3 months ago
Conservation laws and open systems on higher-dimensional networks
— We discuss a framework for defining physical open systems on higher-dimensional complexes. We start with the formalization of the dynamics of open electrical circuits and the ...
Arjan van der Schaft, Bernhard Maschke
ICASSP
2011
IEEE
13 years 15 days ago
Least squares approximation and polyphase decomposition for pipelining recursive filters
Current techniques used in pipelining recursive filters require significant hardware complexity. These techniques attempt to preserve the exact frequency response of the origina...
Aditya Gupta, Andrew C. Singer, Naresh R. Shanbhag