—Functional simulation is still the primary workhorse for verifying the functional correctness of hardware designs. Functional verification is necessarily incomplete because it i...
Current formal models for quantum computation deal only with unitary gates operating on “pure quantum states”. In these models it is difficult or impossible to deal formally w...
A major research goal for compilers and environments is the automatic derivation of tools from formal specifications. However, the formal model of the language is often inadequat...
In performance-driven interconnect design, delay estimators are used to determine both the topology and the layout of good routing trees. We address the class of moment-matching, ...
This paper describes a complete system architecture integrating planning into a two-armed robotic workcell. The system is comprised of four major components: user interface, plann...