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» On the Complexity of Loop Fusion
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DATE
2007
IEEE
72views Hardware» more  DATE 2007»
14 years 4 months ago
The impact of loop unrolling on controller delay in high level synthesis
Loop unrolling is a well-known compiler optimization that can lead to significant performance improvements. When used in High Level Synthesis (HLS) unrolling can affect the contr...
Srikanth Kurra, Neeraj Kumar Singh, Preeti Ranjan ...
EUROPAR
2011
Springer
12 years 9 months ago
Model-Driven Tile Size Selection for DOACROSS Loops on GPUs
DOALL loops are tiled to exploit DOALL parallelism and data locality on GPUs. In contrast, due to loop-carried dependences, DOACROSS loops must be skewed first in order to make ti...
Peng Di, Jingling Xue
CF
2007
ACM
14 years 1 months ago
Identifying potential parallelism via loop-centric profiling
The transition to multithreaded, multi-core designs places a greater responsibility on programmers and software for improving performance; thread-level parallelism (TLP) will be i...
Tipp Moseley, Daniel A. Connors, Dirk Grunwald, Ra...
CDC
2008
IEEE
112views Control Systems» more  CDC 2008»
13 years 11 months ago
Information fusion strategies from distributed filters in packet-drop networks
Abstract-- In this paper we study different distributed estimation schemes for stochastic discrete time linear systems where the communication between the sensors and the estimatio...
Alessandro Chiuso, Luca Schenato
TIME
2005
IEEE
14 years 3 months ago
Search Strategies for Resolution in CTL-Type Logics: Extension and Complexity
A clausal resolution approach originally developed for the branching logic CTL has recently been extended to the logics ECTL and ECTL+ . In the application of the resolution rules...
Artie Basukoski, Alexander Bolotov