287 search results - page 45 / 58 » On the Complexity of Register Coalescing |
AHS
2007
IEEE
13 years 11 months ago
2007
IEEE
In this paper, we propose a design methodology for implementing a multimode (or multi-configuration) and multi-throughput system into a single hardware architecture. The inputs of...
EUROPAR
2009
Springer
13 years 11 months ago
2009
Springer
The Cell Broadband Engine (Cell BE) is a heterogeneous multi-core processor specifically designed to exploit thread-level parallelism. Its memory model comprehends a common shared ...
ICCAD
2007
IEEE
13 years 11 months ago
2007
IEEE
This paper addresses the design of multi-mode architectures for digital signal processing applications. We present a dedicated design flow and its associated high-level synthesis t...
DATE
2004
IEEE
13 years 11 months ago
2004
IEEE
The growing use of digital signal processors (DSPs) in embedded systems necessitates the use of optimizing compilers supporting special hardware features. Due to the irregular arc...
CCGRID
2006
IEEE
13 years 11 months ago
2006
IEEE
Abstract-- The development of high performance parallel applications for clusters is considered a complex task. This can happen because the influence of the execution environment a...