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MICRO
2010
IEEE
167views Hardware» more  MICRO 2010»
13 years 8 months ago
Erasing Core Boundaries for Robust and Configurable Performance
Single-thread performance, reliability and power efficiency are critical design challenges of future multicore systems. Although point solutions have been proposed to address thes...
Shantanu Gupta, Shuguang Feng, Amin Ansari, Scott ...
MICRO
2010
IEEE
119views Hardware» more  MICRO 2010»
13 years 8 months ago
A Predictive Model for Dynamic Microarchitectural Adaptivity Control
Abstract--Adaptive microarchitectures are a promising solution for designing high-performance, power-efficient microprocessors. They offer the ability to tailor computational resou...
Christophe Dubach, Timothy M. Jones, Edwin V. Boni...
WCET
2010
13 years 8 months ago
WCET Analysis of a Parallel 3D Multigrid Solver Executed on the MERASA Multi-Core
To meet performance requirements as well as constraints on cost and power consumption, future embedded systems will be designed with multi-core processors. However, the question o...
Christine Rochange, Armelle Bonenfant, Pascal Sain...
CISC
2009
Springer
199views Cryptology» more  CISC 2009»
13 years 8 months ago
Cryptanalysis of Certificateless Signcryption Schemes and an Efficient Construction without Pairing
Abstract. Certificateless cryptography introduced by Al-Riyami and Paterson eliminates the key escrow problem inherent in identity based cryptosystems. Even though building practic...
S. Sharmila Deva Selvi, S. Sree Vivek, C. Pandu Ra...
IALP
2009
13 years 8 months ago
Improved Reordering Rules for Hierarchical Phrase-Based Translation
Hierarchical phrase-based translation model has been proven to be a simple and powerful machine translation model. However, due to the computational complexity constraints, the ext...
Shu Cai, Yajuan Lü, Qun Liu
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