Sciweavers

115 search results - page 18 / 23
» On the Design of IEEE Compliant Floating Point Units
Sort
View
VIS
2005
IEEE
128views Visualization» more  VIS 2005»
14 years 9 months ago
Hardware-Accelerated Simulated Radiography
We present the application of hardware accelerated volume rendering algorithms to the simulation of radiographs as an aid to scientists designing experiments, validating simulatio...
Cláudio T. Silva, Daniel E. Laney, Nelson L...
ISCAS
2003
IEEE
83views Hardware» more  ISCAS 2003»
14 years 1 months ago
An Integrated Framework of Design Optimization and Space Minimization for DSP applications
This paper presents an Integrated Framework of Design Optimization and Space Minimization (IDOM) for generating the minimum number of functional units with schedule length and mem...
Qingfeng Zhuge, Edwin Hsing-Mean Sha, Chantana Cha...
ISCAS
2003
IEEE
96views Hardware» more  ISCAS 2003»
14 years 1 months ago
Interface design approach for system on chip based on configuration
Communication synthesis is an essential step in hardware/software co-synthesis: many embedded systems use automatic generation of interface for point to point communication or use...
Issam Maalej, Guy Gogniat, Mohamed Abid, Jean Luc ...
VTC
2006
IEEE
14 years 1 months ago
Complexity-Reduced Iterative MAP Receiver with Partial Sphere Decoding in Spatial Multiplexing System
– In this paper, a partial sphere decoding approach is proposed to reduce the computational complexity of implementing the iterative MAP receiver for spatial multiplexing system,...
Hyung Ho Park, Tae Young Min, Dong Seung Kwon, Chu...
ICALT
2007
IEEE
14 years 2 months ago
The Design of e-Learning Environment Oriented for Personalized Adaptability
A design of e-Learning environment is described for personalized adaptability. At first, we explain the whole system of our learning management system, WebClass RAPSODY, which has...
Toshie Ninomiya, Ken Nakayama, Miyuki Shimizu, Fum...