372 search results - page 6 / 75 » On the Fault Testing for Reversible Circuits |
DAC
2005
ACM
13 years 10 months ago
2005
ACM
1 This paper presents a transient faults sensitivity evaluation for Quasi Delay Insensitive (QDI) asynchronous circuits. Because of their specific architecture, asynchronous circui...
DAC
2005
ACM
13 years 10 months ago
2005
ACM
In this paper we propose a test compaction method for path delay faults in a logic circuit. The method generates a compact set of two-pattern tests for faults on long paths select...
DATE
2000
IEEE
14 years 29 days ago
2000
IEEE
We study the effectiveness of functional tests for full scan circuits. Functional tests are important for design validation, and they potentially have a high defect coverage indep...
ICCAD
2006
IEEE
14 years 5 months ago
2006
IEEE
We describe a transition fault model, which is easy to simulate under test sequences that are applied at-speed, and provides a target for the generation of at-speed test sequences...
DFT
1997
IEEE
14 years 23 days ago
1997
IEEE
The paper presents a test pattern generation and fault simulation methodology for the detection of catastrophic faults in analogue circuits. The test methodology chosen for evalua...