2492 search results - page 287 / 499 » On the General Signature Trees |
132
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DAC
2008
ACM
2008
ACM
An area-efficient high-throughput hybrid interconnection network for single-chip parallel processing
16 years 7 months ago
Single-chip parallel processing requires high bandwidth between processors and on-chip memory modules. A recently proposed Mesh-of-Trees (MoT) network provides high throughput and...
144
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DAC
2007
ACM
16 years 7 months ago
2007
ACM
High efficiency low voltage DC-DC conversion is a key enabler to the design of power-efficient integrated circuits. Typically a star configuration of the DC-DC converters, where o...
121
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DAC
2005
ACM
16 years 7 months ago
2005
ACM
As the process technology enters the nanometer era, reliability has become a major concern in the design and manufacturing of VLSI circuits. In this paper we focus on one reliabil...
144
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DAC
2005
ACM
16 years 7 months ago
2005
ACM
This paper presents a novel repeater insertion algorithm for the power minimization of realistic interconnect trees under given timing budgets. Our algorithm judiciously combines ...
156
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DAC
2005
ACM
16 years 7 months ago
2005
ACM
Input vector control (IVC) technique utilizes the stack effect in CMOS circuit to apply the minimum leakage vector (MLV) to the circuit at the sleep mode to reduce leakage. Additi...