281 search results - page 12 / 57 » On the Hardware Implementation Cost of Crypto-Processors Arc... |
DATE
2008
IEEE
14 years 2 months ago
2008
IEEE
This paper presents a novel architecture for on-chip neural network training using particle swarm optimization (PSO). PSO is an evolutionary optimization algorithm with a growing ...
ISPASS
2010
IEEE
14 years 2 months ago
2010
IEEE
—In the past ten years, computer architecture has seen a paradigm shift from emphasizing single thread performance to energy efficient, throughput oriented, chip multiprocessors...
SBACPAD
2007
IEEE
14 years 1 months ago
2007
IEEE
Code Compression has been used to alleviate the memory requirements as well as to improve performance and/or minimize energy consumption. On the other hand, implementing security ...
ASAP
2010
IEEE
13 years 5 months ago
2010
IEEE
Abstract--This paper proposes an FPGA-based applicationspecific elliptic curve processor over a prime field. This research targets applications for which compactness is more import...
CARDIS
2008
Springer
13 years 9 months ago
2008
Springer
In recent years more and more security sensitive applications use passive smart devices such as contactless smart cards and RFID tags. Cost constraints imply a small hardware footp...