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» On the Meaning of Logical Completeness
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CHES
2007
Springer
126views Cryptology» more  CHES 2007»
14 years 5 months ago
How to Maximize the Potential of FPGA Resources for Modular Exponentiation
This paper describes a modular exponentiation processing method and circuit architecture that can exhibit the maximum performance of FPGA resources. The modular exponentiation arch...
Daisuke Suzuki
ICNP
2006
IEEE
14 years 5 months ago
Rigorous Protocol Design in Practice: An Optical Packet-Switch MAC in HOL
— This paper reports on an experiment in network protocol design: we use novel rigorous techniques in the design process of a new protocol, in a close collaboration between syste...
Adam Biltcliffe, Michael Dales, Sam Jansen, Tom Ri...
PODC
2003
ACM
14 years 4 months ago
A lattice-theoretic characterization of safety and liveness
The distinction between safety and liveness properties is due to Lamport who gave the following informal characterization. Safety properties assert that nothing bad ever happens w...
Panagiotis Manolios, Richard J. Trefler
SEMWEB
2009
Springer
14 years 3 months ago
A Weighted Approach to Partial Matching for Mobile Reasoning
Due to significant improvements in the capabilities of small devices such as PDAs and smart phones, these devices can not only consume but also provide Web Services. The dynamic n...
Luke Albert Steller, Shonali Krishnaswamy, Mohamed...
ASYNC
2000
IEEE
181views Hardware» more  ASYNC 2000»
14 years 3 months ago
Asynchronous Design Using Commercial HDL Synthesis Tools
New design technologies rely on truly reusable IP blocks with simple means of assembly. Asynchronous methodologies could be a promising option to implement these requirements. Pro...
Michiel M. Ligthart, Karl Fant, Ross Smith, Alexan...