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LCTRTS
2010
Springer
14 years 2 months ago
2010
Springer
With increasingly more complex Multi-Processor Systems on Chip (MPSoC) and shortening time-to- market projections, Transaction Level Modeling and Platform Aware Design are seen as...
ERLANG
2003
ACM
14 years 1 months ago
2003
ACM
The viability of implementing an in-memory database, Erlang ETS, using a relatively-new data structure, called a Judy array, was studied by comparing the performance of ETS tables...
SPAA
2010
ACM
14 years 26 days ago
2010
ACM
TL2 and similar STM algorithms deliver high scalability based on write-locking and invisible readers. In fact, no modern STM design locks to read along its common execution path b...
CONCURRENCY
2004
2004
User transparency: a fully sequential programming model for efficient data parallel image processing
13 years 8 months ago
Although many image processing applications are ideally suited for parallel implementation, most researchers in imaging do not benefit from high performance computing on a daily b...
ICCAD
2008
IEEE
14 years 5 months ago
2008
IEEE
— Leveraging the power of scratchpad memories (SPMs) available in most embedded systems today is crucial to extract maximum performance from application programs. While regular a...