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ASAP
2006
IEEE
119views Hardware» more  ASAP 2006»
15 years 8 months ago
From Bit Level Systolic Arrays to HDTV Processor Chips
The paper starts presents the work initially carried out by Queen's University and RSRE (now Qinetiq) in the development of advanced architectures and microchips based on sys...
John V. McCanny, Roger F. Woods, John G. McWhirter
APPINF
2003
15 years 7 months ago
Preventing Computational Chaos in Asynchronous Neural Networks
One of the primary advantages of artificial neural networks is their inherent ability to perform massively parallel, nonlinear signal processing. However, the asynchronous dynamics...
Jacob Barhen, Vladimir Protopopescu
EUSFLAT
2001
15 years 7 months ago
A DSP-based fuzzy system for real-time interference cancellation in DS-SS systems
This work demonstrates that high-end classical programmable digital signal processors (DSPs) can implement fuzzy systems for real-time communication processing. A systematic proce...
Joan Bas, Xavier Alberti, Ana I. Pérez-Neir...
ICEC
1994
70views more  ICEC 1994»
15 years 7 months ago
Evolving Synaptic Connections for a Silicon Neuromorph
Our VLSI neuromorphs, possess extensive dendritic trees with hundreds of excitatory and inhibitory synaptic sites. Useful signal processing can be achieved by evolving the appropr...
David P. M. Northmore, John G. Elias
ICASSP
2010
IEEE
15 years 6 months ago
Generalized Discrete Fourier Transform with optimum correlations
— In this paper, we present design methods to optimize nonlinear phase functions of Generalized DFT (GDFT) for minimized auto and cross correlations. It is shown that GDFT offers...
Ali N. Akansu, Handan Agirman-Tosun