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SAMOS
2010
Springer
13 years 6 months ago
Cycle-accurate performance modelling in an ultra-fast just-in-time dynamic binary translation instruction set simulator
—Instruction set simulators (ISS) are vital tools for compiler and processor architecture design space exploration and verification. State-of-the-art simulators using just-in-ti...
Igor Böhm, Björn Franke, Nigel P. Topham
GECCO
2003
Springer
100views Optimization» more  GECCO 2003»
14 years 26 days ago
Dense and Switched Modular Primitives for Bond Graph Model Design
This paper suggests dense and switched modular primitives for a bond-graph-based GP design framework that automatically synthesizes designs for multi-domain, lumped parameter dynam...
Kisung Seo, Zhun Fan, Jianjun Hu, Erik D. Goodman,...
IPPS
2006
IEEE
14 years 1 months ago
Reducing reconfiguration time of reconfigurable computing systems in integrated temporal partitioning and physical design framew
In reconfigurable systems, reconfiguration latency is a very important factor impact the system performance. In this paper, a framework is proposed that integrates the temporal pa...
Farhad Mehdipour, Morteza Saheb Zamani, H. R. Ahma...
CCGRID
2003
IEEE
14 years 28 days ago
Building a Performance Model of Streaming Media Applications in Utility Data Center Environment
Abstract Utility Data Center (UDC) provides a exible, coste ective infrastructure to support the hosting of applications for Internet services. In order to enable the design of a \...
Ludmila Cherkasova, Loren Staley
IPPS
1998
IEEE
13 years 12 months ago
Design and Implementation of a Parallel I/O Runtime System for Irregular Applications
In this paper we present the design, implementation and evaluation of a runtime system based on collective I/O techniques for irregular applications. We present two models, namely...
Jaechun No, Sung-Soon Park, Jesús Carretero...