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EURODAC
1994
IEEE
209views VHDL» more  EURODAC 1994»
13 years 11 months ago
MOS VLSI circuit simulation by hardware accelerator using semi-natural models
- The accelerator is destined to circuit-level simulation of digital and analog/digital MOS VLSI'c containing of up to 100 thousand transistors (with 16 Mb RAM host-machine). ...
Victor V. Denisenko
ESANN
2003
13 years 8 months ago
Accelerating the convergence speed of neural networks learning methods using least squares
In this work a hybrid training scheme for the supervised learning of feedforward neural networks is presented. In the proposed method, the weights of the last layer are obtained em...
Oscar Fontenla-Romero, Deniz Erdogmus, José...
CODES
2005
IEEE
14 years 22 days ago
Comparing two testbench methods for hierarchical functional verification of a bluetooth baseband adaptor
The continuous improvement on the design methodologies and processes has made possible the creation of huge and very complex digital systems. Design verification is one of the mai...
Edgar L. Romero, Marius Strum, Wang Jiang Chau
ISQED
2003
IEEE
109views Hardware» more  ISQED 2003»
14 years 11 days ago
Modeling and Analysis of Power Distribution Networks for Gigabit Applications
—As the operating frequency of digital systems increases and voltage swing decreases, it becomes very important to characterize and analyze power distribution networks (PDNs) acc...
Wendemagegnehu T. Beyene, Chuck Yuan, Joong-Ho Kim...
CASES
2008
ACM
13 years 9 months ago
Multi-granularity sampling for simulating concurrent heterogeneous applications
Detailed or cycle-accurate/bit-accurate (CABA) simulation is a critical phase in the design flow of embedded systems. However, with increasing system complexity, full detailed sim...
Melhem Tawk, Khaled Z. Ibrahim, Smaïl Niar