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» On the energy-efficiency of speculative hardware
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SBACPAD
2004
IEEE
77views Hardware» more  SBACPAD 2004»
13 years 11 months ago
Value Predictors for Reuse through Speculation on Traces
Reusing dynamic sequences of instructions
Maurício L. Pilla, Philippe Olivier Alexand...
FCCM
2005
IEEE
84views VLSI» more  FCCM 2005»
14 years 3 months ago
Prototyping Architectural Support for Program Rollback Using FPGAs
This paper presents a processor and memory-hierarchy prototype based on FPGAs that provides hardware support for program rollback. We use this prototype to demonstrate how compile...
Radu Teodorescu, Josep Torrellas
IEEEPACT
2003
IEEE
14 years 3 months ago
Using Software Logging to Support Multi-Version Buffering in Thread-Level Speculation
In Thread-Level Speculation (TLS), speculative tasks generate memory state that cannot simply be combined with the rest of the system because it is unsafe. One way to deal with th...
María Jesús Garzarán, Milos P...
IEEEPACT
2007
IEEE
14 years 4 months ago
Fast Track: Supporting Unsafe Optimizations with Software Speculation
The use of multi-core, multi-processor machines is opening new opportunities for software speculation, where program code is speculatively executed to improve performance at the a...
Kirk Kelsey, Chengliang Zhang, Chen Ding
CGO
2003
IEEE
14 years 3 months ago
Speculative Register Promotion Using Advanced Load Address Table (ALAT)
The pervasive use of pointers with complicated patterns in C programs often constrains compiler alias analysis to yield conservative register allocation and promotion. Speculative...
Jin Lin, Tong Chen, Wei-Chung Hsu, Pen-Chung Yew