Current trends signal an imminent crisis in the simulation of future CMPs (Chip MultiProcessors). Future micro-architectures will offer more and more thread contexts to execute pa...
Jianwei Chen, Lakshmi Kumar Dabbiru, Daniel Wong, ...
Embedded processors have been increasingly exploiting hardware parallelism. Vector units, multiple processors or cores, hyper-threading, special-purpose accelerators such as DSPs ...
Arun Kejariwal, Alexander V. Veidenbaum, Alexandru...
Power-Efficient DRAM Speculation (PEDS) is a power optimization targeted at broadcast-based sharedmemory multiprocessor systems that speculatively access DRAM in parallel with the...
Nidhi Aggarwal, Jason F. Cantin, Mikko H. Lipasti,...
Memory dependence prediction allows out-of-order issue processors to achieve high degrees of instruction level parallelism by issuing load instructions at the earliest time withou...
Recent research results have seen the application of parallelizing techniques to high-level synthesis. In particular, the effect of speculative code transformations on mixed contr...
Roberto Cordone, Fabrizio Ferrandi, Marco D. Santa...