415 search results - page 41 / 83 » On the energy-efficiency of speculative hardware |
APCSAC
2005
IEEE
14 years 2 months ago
2005
IEEE
In order to enhance the performance of a computer, most modern processors use superscalar architecture and raise the clock frequency. Superscalar architecture can execute more than...
SIGSOFT
2010
ACM
13 years 6 months ago
2010
ACM
Most software tools and environments help developers analyze the present and past development states of their software systems. Few approaches have investigated the potential cons...
IEEEPACT
2009
IEEE
14 years 3 months ago
2009
IEEE
Industry is moving towards multi-core designs as we have hit the memory and power walls. Multi-core designs are very effective to exploit thread-level parallelism (TLP) but do not...
HPCA
1998
IEEE
14 years 1 months ago
1998
IEEE
As we look to the future, and the prospect of a billion transistors on a chip, it seems inevitable that microprocessors will exploit having multiple parallel threads. To achieve t...
IPPS
2006
IEEE
14 years 3 months ago
2006
IEEE
With the advent of chip-multiprocessors (CMPs), Thread-Level Speculation (TLS) remains a promising technique for exploiting this highly multithreaded hardware to improve the perfo...