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APCSAC
2005
IEEE
14 years 2 months ago
Rule-Based Power-Balanced VLIW Instruction Scheduling with Uncertainty
Abstract. Power-balanced instruction scheduling for Very Long Instruction Word (VLIW) processors is an optimization problem which requires a good instruction-level power model for ...
Shu Xiao, Edmund Ming-Kit Lai, A. Benjamin Premkum...
HIPEAC
2005
Springer
14 years 2 months ago
Power Aware External Bus Arbitration for System-on-a-Chip Embedded Systems
Abstract. Power efficiency has become a key design trade-off in embedded system designs. For system-on-a-chip embedded systems, an external bus interconnects embedded processor co...
Ke Ning, David R. Kaeli
CDC
2009
IEEE
141views Control Systems» more  CDC 2009»
14 years 1 months ago
Periodic power management schemes for real-time event streams
Abstract— Power dissipation has constrained the performance boosting of modern computer systems in the past decade. Dynamic power management (DPM) has been implemented in many sy...
Kai Huang, Luca Santinelli, Jian-Jia Chen, Lothar ...
HPCC
2007
Springer
14 years 21 days ago
Power-Aware Fat-Tree Networks Using On/Off Links
Abstract. Nowadays, power consumption reduction techniques are being increasingly used in computer systems, and high-performance computing systems are not an exception. In particul...
Marina Alonso, Salvador Coll, Vicente Santonja, Ju...
ISLPED
1995
ACM
96views Hardware» more  ISLPED 1995»
14 years 11 days ago
Towards a high-level power estimation capability
We will present a power estimation technique for digital integrated circuits that operates at the register transfer level RTL. Such a high-level power estimation capability is r...
Farid N. Najm