Sciweavers

17 search results - page 4 / 4
» On wirelength estimations for row-based placement
Sort
View
ICCAD
2005
IEEE
97views Hardware» more  ICCAD 2005»
14 years 4 months ago
DiCER: distributed and cost-effective redundancy for variation tolerance
— Increasingly prominent variational effects impose imminent threat to the progress of VLSI technology. This work explores redundancy, which is a well-known fault tolerance techn...
Di Wu, Ganesh Venkataraman, Jiang Hu, Quiyang Li, ...
ISPD
2005
ACM
174views Hardware» more  ISPD 2005»
14 years 1 months ago
Fast and accurate rectilinear steiner minimal tree algorithm for VLSI design
In this paper, we present a very fast and accurate rectilinear Steiner minimal tree (RSMT)1 algorithm called FLUTE. The algorithm is an extension of the wirelength estimation appr...
Chris C. N. Chu, Yiu-Chung Wong