66 search results - page 6 / 14 » On-Chip Inductance in X Architecture Enabled Design |
FPL
2009
Springer
14 years 9 days ago
2009
Springer
In this paper we present a verification platform designed for HyperTransport 3.x (HT3) applications. HyperTransport 3.x is a very low latency and high bandwidth chip-tochip interc...
ICECCS
2005
IEEE
14 years 1 months ago
2005
IEEE
This paper articulates a system design for the secure role based messaging model built based on existing messaging systems, public key infrastructures, and a privilege management ...
DAC
2007
ACM
14 years 8 months ago
2007
ACM
Off-chip decoupling capacitor (decap) allocation is a demanding task during package and chip codesign. Existing approaches can not handle large numbers of I/O counts and large num...
ISSS
2002
IEEE
14 years 18 days ago
2002
IEEE
Message-passing mechanism is commonly used to preserve data coherency in distributed systems. This paper presents an algorithm for insertion of minimal message-passing in system-l...
ICCAD
2007
IEEE
14 years 4 months ago
2007
IEEE
—In this paper, we introduce a novel reconfigurable architecture, named 3D nFPGA, which utilizes 3D integration techniques and new nanoscale materials synergistically. The propos...