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CODES
2007
IEEE
14 years 2 months ago
Reliable multiprocessor system-on-chip synthesis
This article presents a multiprocessor system-on-chip synthesis (MPSoC) algorithm that optimizes system mean time to failure. Given a set of directed acyclic periodic graphs of co...
Changyun Zhu, Zhenyu (Peter) Gu, Robert P. Dick, L...
AGENTS
1998
Springer
13 years 12 months ago
A Hybrid Procedural/Deductive Executive for Autonomous Spacecraft
The New Millennium Remote Agent NMRA will be the rst AI system to control an actual spacecraft. The spacecraft domain places a strong premium on autonomy and requires dynamic reco...
Barney Pell, Edward B. Gamble, Erann Gat, Ron Kees...
IEEEPACT
2007
IEEE
14 years 1 months ago
Automatic Correction of Loop Transformations
Loop nest optimization is a combinatorial problem. Due to the growing complexity of modern architectures, it involves two increasingly difficult tasks: (1) analyzing the profita...
Nicolas Vasilache, Albert Cohen, Louis-Noël P...
SECON
2007
IEEE
14 years 1 months ago
Experimental Investigation of IEEE 802.15.4 Transmission Power Control and Interference Minimization
Abstract—Although the characteristics of RF transmissions are physically well understood at the lowest levels of communication design, accurately incorporating power and interfer...
Steven Myers, Seapahn Megerian, Suman Banerjee, Mi...
MOBIHOC
2007
ACM
14 years 7 months ago
Cross-layer latency minimization in wireless networks with SINR constraints
Recently, there has been substantial interest in the design of crosslayer protocols for wireless networks. These protocols optimize certain performance metric(s) of interest (e.g....
Deepti Chafekar, V. S. Anil Kumar, Madhav V. Marat...