704 search results - page 4 / 141 » On-chip logic minimization |
SBACPAD
2007
IEEE
14 years 4 months ago
2007
IEEE
In this paper, an adaptive wormhole router for a flexible on-chip interconnection network is proposed and implemented for a Chip-Multi Processor (CMP). It adopts a wormhole switc...
ITC
1997
IEEE
14 years 2 months ago
1997
IEEE
- An all-digital technique for the measurement of the jitter transfer function of charge-pump phase-locked loops is introduced. Input jitter may be generated using one of two metho...
AHS
2006
IEEE
14 years 3 months ago
2006
IEEE
To increase the flexibility of single-chip evolvable hardware systems, we explore possibilities of systems with the evolutionary algorithm implemented in software on an onchip pr...
ASAP
2005
IEEE
14 years 3 months ago
2005
IEEE
On public communication networks such as the Internet, data confidentiality can be provided by symmetric-key ciphers. One of the most common operations used in symmetric-key ciphe...
DFT
2003
IEEE
14 years 3 months ago
2003
IEEE
Test scheduling and Test Access Mechanism (TAM) design are two important tasks in the development of a System-on-Chip (SOC) test solution. Previous test scheduling techniques assu...