Sciweavers

1268 search results - page 59 / 254
» One Logic to Use Them All
Sort
View
AAAI
2004
13 years 11 months ago
Adding Time and Intervals to Procedural and Hierarchical Control Specifications
In this paper we introduce the language Golog+HTNT I for specifying control using procedural and HTN-based constructs together with deadlines and time restrictions. Our language s...
Tran Cao Son, Chitta Baral, Le-Chi Tuan
ISCA
2009
IEEE
159views Hardware» more  ISCA 2009»
14 years 4 months ago
End-to-end register data-flow continuous self-test
While Moore’s Law predicts the ability of semi-conductor industry to engineer smaller and more efficient transistors and circuits, there are serious issues not contemplated in t...
Javier Carretero, Pedro Chaparro, Xavier Vera, Jau...
JELIA
1994
Springer
14 years 2 months ago
Temporal Theories of Reasoning
: In this paper we describe a general way of formalizing reasoning behaviour. Such a behaviour may be described by all the patterns which are valid for the behaviour. A pattern can...
Joeri Engelfriet, Jan Treur
SPIN
2010
Springer
13 years 8 months ago
Enacting Declarative Languages Using LTL: Avoiding Errors and Improving Performance
In our earlier work we have proposed using the declarative language DecSerFlow for modeling, analysis and enactment of processes in autonomous web services. DecSerFlow uses constra...
Maja Pesic, Dragan Bosnacki, Wil M. P. van der Aal...
IEEEPACT
2005
IEEE
14 years 3 months ago
Compiler Directed Early Register Release
This paper presents a novel compiler directed technique to reduce the register pressure and power of the register file by releasing registers early. The compiler identifies regi...
Timothy M. Jones, Michael F. P. O'Boyle, Jaume Abe...