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CONEXT
2009
ACM
13 years 11 months ago
BUFFALO: bloom filter forwarding architecture for large organizations
In enterprise and data center networks, the scalability of the data plane becomes increasingly challenging as forwarding tables and link speeds grow. Simply building switches with...
Minlan Yu, Alex Fabrikant, Jennifer Rexford
IRI
2009
IEEE
14 years 4 months ago
Using 4KB Page Size for Virtual Memory is Obsolete
A 4KB page size has been used for Virtual Memory since the sixties. In fact, today, the most common page size is still 4KB. Choosing a page size is finding the middle ground betwe...
Pinchas Weisberg, Yair Wiseman
JCO
2011
115views more  JCO 2011»
13 years 4 months ago
Approximation scheme for restricted discrete gate sizing targeting delay minimization
Discrete gate sizing is a critical optimization in VLSI circuit design. Given a set of available gate sizes, discrete gate sizing problem asks to assign a size to each gate such th...
Chen Liao, Shiyan Hu
CODES
2003
IEEE
14 years 3 months ago
Design space minimization with timing and code size optimization for embedded DSP
One of the most challenging problems in high-level synthesis is how to quickly explore a wide range of design options to achieve high-quality designs. This paper presents an Integ...
Qingfeng Zhuge, Zili Shao, Bin Xiao, Edwin Hsing-M...
ICS
2010
Tsinghua U.
14 years 2 months ago
Weight Distribution and List-Decoding Size of Reed-Muller Codes
: We study the weight distribution and list-decoding size of Reed-Muller codes. Given a weight parameter, we are interested in bounding the number of Reed-Muller codewords with a w...
Tali Kaufman, Shachar Lovett, Ely Porat