69 search results - page 7 / 14 » Online cache modeling for commodity multicore processors |
PPOPP
2010
ACM
14 years 4 months ago
2010
ACM
In LAPACK many matrix operations are cast as block algorithms which iteratively process a panel using an unblocked algorithm and then update a remainder matrix using the high perf...
IPPS
2010
IEEE
13 years 4 months ago
2010
IEEE
Recently, there has been strong interest in large-scale simulations of biological spiking neural networks (SNN) to model the human brain mechanisms and capture its inference capabi...
CODES
2007
IEEE
14 years 1 months ago
2007
IEEE
Performance analysis of microprocessors is a critical step in defining the microarchitecture, prior to register-transfer-level (RTL) design. In complex chip multiprocessor systems...
OOPSLA
2010
Springer
13 years 5 months ago
2010
Springer
Heterogeneous multi-core processors, such as the IBM Cell processor, can deliver high performance. However, these processors are notoriously difficult to program: different cores...
HIPEAC
2010
Springer
14 years 3 months ago
2010
Springer
Abstract. The shared-cache contention on Chip Multiprocessors causes performance degradation to applications and hurts system fairness. Many previously proposed solutions schedule ...