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ISVLSI
2006
IEEE
106views VLSI» more  ISVLSI 2006»
14 years 2 months ago
Self-Timed Thermally-Aware Circuits
Thermal management is becoming increasingly important in circuit designs with high power density. Circuits that overheat beyond specified operating conditions may suffer timing f...
David Fang, Filipp Akopyan, Rajit Manohar
FPT
2005
IEEE
131views Hardware» more  FPT 2005»
14 years 2 months ago
Dynamic Voltage Scaling for Commercial FPGAs
A methodology for supporting dynamic voltage scaling (DVS) on commercial FPGAs is described. A logic delay measurement circuit (LDMC) is used to determine the speed of an inverter...
C. T. Chow, L. S. M. Tsui, Philip Heng Wai Leong, ...
DATE
2000
IEEE
65views Hardware» more  DATE 2000»
14 years 1 months ago
Test Quality and Fault Risk in Digital Filter Datapath BIST
An objective of DSP testing should be to ensure that any errors due to missed faults are infrequent compared to a circuit’s intrinsic errors, such as overflow. A method is prop...
Laurence Goodby, Alex Orailoglu
CCR
2010
96views more  CCR 2010»
13 years 9 months ago
Dummynet revisited
Dummynet is a widely used link emulator, developed long ago to run experiments in user-configurable network environments. Since its original design, Dummynet has been extended in ...
Marta Carbone, Luigi Rizzo
FDTC
2010
Springer
124views Cryptology» more  FDTC 2010»
13 years 6 months ago
Optical Fault Masking Attacks
This paper introduces some new types of optical fault attacks called fault masking attacks. These attacks are aimed at disrupting of the normal memory operation through preventing ...
Sergei Skorobogatov