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169
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ICCAD
2010
IEEE
158views Hardware» more  ICCAD 2010»
15 years 1 months ago
Novel binary linear programming for high performance clock mesh synthesis
Clock mesh is popular in high performance VLSI design because it is more robust against variations than clock tree at a cost of higher power consumption. In this paper, we propose ...
Minsik Cho, David Z. Pan, Ruchir Puri
152
Voted
VMCAI
2010
Springer
15 years 10 months ago
Regular Linear Temporal Logic with Past
This paper upgrades Regular Linear Temporal Logic (RLTL) with past operators and complementation. RLTL is a temporal logic that extends the expressive power of linear temporal logi...
César Sánchez, Martin Leucker
135
Voted
IPPS
2008
IEEE
15 years 10 months ago
Build to order linear algebra kernels
—The performance bottleneck for many scientific applications is the cost of memory access inside linear algebra kernels. Tuning such kernels for memory efficiency is a complex ...
Jeremy G. Siek, Ian Karlin, Elizabeth R. Jessup
125
Voted
CORR
2010
Springer
98views Education» more  CORR 2010»
15 years 3 months ago
Linear Operator Channels over Finite Fields
Motivated by random linear network coding, we study the communication through channels, called linear operator channels (LOCs), that perform linear operation over finite fields. Fo...
Shenghao Yang, Siu-Wai Ho, Jin Meng, En-Hui Yang
119
Voted
CORR
2010
Springer
124views Education» more  CORR 2010»
15 years 3 months ago
Integer-Forcing Linear Receivers
Abstract--Linear receivers are often used to reduce the implementation complexity of multiple antenna systems. In a traditional linear receiver architecture, the receive antennas a...
Jiening Zhan, Bobak Nazer, Uri Erez, Michael Gastp...