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FPGA
2004
ACM
121views FPGA» more  FPGA 2004»
14 years 4 months ago
Divide and concatenate: a scalable hardware architecture for universal MAC
We present a cryptographic architecture optimization technique called divide-and-concatenate based on two observations: (i) the area of a multiplier and associated data path decre...
Bo Yang, Ramesh Karri, David A. McGrew
ICALP
2004
Springer
14 years 4 months ago
Online Scheduling with Bounded Migration
Consider the classical online scheduling problem where jobs that arrive one by one are assigned to identical parallel machines with the objective of minimizing the makespan. We gen...
Peter Sanders, Naveen Sivadasan, Martin Skutella
ICDE
2010
IEEE
434views Database» more  ICDE 2010»
14 years 4 months ago
Route skyline queries: A multi-preference path planning approach
— In recent years, the research community introduced various methods for processing skyline queries in multidimensional databases. The skyline operator retrieves all objects bein...
Hans-Peter Kriegel, Matthias Renz, Matthias Schube...
ISPD
2003
ACM
110views Hardware» more  ISPD 2003»
14 years 4 months ago
Explicit gate delay model for timing evaluation
Delay evaluation is always a crucial concern in the VLSI design and it becomes increasingly more critical in the nowadays deep-submicron technology. To obtain an accurate delay va...
Muzhou Shao, Martin D. F. Wong, Huijing Cao, Youxi...
GECCO
2003
Springer
189views Optimization» more  GECCO 2003»
14 years 4 months ago
A Forest Representation for Evolutionary Algorithms Applied to Network Design
Abstract. Network design involves several areas of engineering and science. Computer networks, electrical circuits, transportation problems, and phylogenetic trees are some example...
Alexandre C. B. Delbem, André Carlos Ponce ...