Abstract—Many next-generation Internet architectures propose advanced packet processing functions in the data path of the network. Such “services” are typically performed on ...
Domain-specific reconfigurable arrays have shown to provide an efficient trade-off between flexibility of FPGA and performance of ASIC circuit. Nonetheless, the design of these he...
— In this paper, we present the first multi-objective microarchitectural floorplanning algorithm for designing highperformance, high-reliability processors in the early design ...
Michael B. Healy, Mario Vittes, Mongkol Ekpanyapon...
We present an approach to the synthesis of fault-tolerant hard real-time systems for safety-critical applications. We use checkpointing with rollback recovery and active replicati...
Viacheslav Izosimov, Paul Pop, Petru Eles, Zebo Pe...
Currently, most quantization based data hiding algorithms are built assuming specific distributions of attacks, such as additive white Gaussian noise (AWGN), uniform noise, and s...