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EURODAC
1994
IEEE
127views VHDL» more  EURODAC 1994»
14 years 1 months ago
Optimal equivalent circuits for interconnect delay calculations using moments
In performance-driven interconnect design, delay estimators are used to determine both the topology and the layout of good routing trees. We address the class of moment-matching, ...
Sudhakar Muddu, Andrew B. Kahng
BMCBI
2008
84views more  BMCBI 2008»
13 years 10 months ago
poolHiTS: A Shifted Transversal Design based pooling strategy for high-throughput drug screening
Background: A key goal of drug discovery is to increase the throughput of small molecule screens without sacrificing screening accuracy. High-throughput screening (HTS) in drug di...
Raghunandan M. Kainkaryam, Peter J. Woolf
PLDI
1994
ACM
14 years 1 months ago
Memory Access Coalescing: A technique for Eliminating Redundant memory Accesses
As microprocessor speeds increase, memory bandwidth is increasing y the performance bottleneck for microprocessors. This has occurred because innovation and technological improvem...
Jack W. Davidson, Sanjay Jinturkar
SCAM
2005
IEEE
14 years 3 months ago
Declassification: Transforming Java Programs to Remove Intermediate Classes
This paper presents an optimisation technique which automatically inlines certain classes within their enclosing class. Inlining a class involves inserting the fields and methods ...
Bernadette Power, Geoff W. Hamilton
CPHYSICS
2006
127views more  CPHYSICS 2006»
13 years 9 months ago
GenAnneal: Genetically modified Simulated Annealing
A modification of the standard Simulated Annealing (SA) algorithm is presented for finding the global minimum of a continuous multidimensional, multimodal function. We report resu...
Ioannis G. Tsoulos, Isaac E. Lagaris